Avery Announces 800G Ethernet VIP Virtual Network Co-Simulation Platform, Enabling Pre-Silicon SoC Validation in Real-World Networked Application Environments


A fully tested VIP can be leveraged in virtual network scenarios and across all layers and protocols of the network stack, accelerating verification closure

SANTA CLARA, CA Flash Memory Summit (#FMS2022) – August 2, 2022 – Avery Design Systems today announced that its fully tested Verification IP (VIP) address for 800 Gbps Ethernet can now be used to perform virtual network co-simulation for the full-layer Ethernet 2-7 network stack . The combination of the VIP and a virtual co-simulation/co-emulation system allows the execution of a complete hardware/software system check on the pre-silicon RTL SoC and software integrations. System designers can now perform system-level validation of the Ethernet and TCP/IP network interfaces of an SoC design using real network traffic workloads of communication network protocols, data center and storage running on host operating system or virtual machine (guest operating system) platforms.

The virtual network co-simulation solution is the latest extension of Avery’s virtual platform co-simulation/co-emulation strategy for next-generation pre-silicon validation of interfaces in system-level environments. . With its approach, virtual platform co-simulation virtualizes host or embedded devices such as PCIe, CXL, AMBA and now Ethernet interfaces, so that verification can be performed under real-world operational conditions, including verification software integration.

This follows other news from Avery Design Systems this week, including CXL 3.0 support and that its NVMe, PCIe and AXI VIPs have been adopted by TenaFe for new solid-state storage controllers.

Ethernet support for memory interface verification

A key application for using Ethernet VIP is NVMe-over-TCP which applies TCP application interfaces in a pure software host driver or optimized hardware offload to implement disaggregated and composable block storage systems over an IP network and standard ethernet. Alternatively, in large distributed compute server architectures, designers can incorporate NVMe-MI in-band usage patterns over IP control path networks for centralized discovery and control.

“Harnessing the bandwidth and performance of Ethernet has become increasingly important in a range of data transfer intensive applications and time to market is a major concern for product developers. Performing full hardware/software, system-level verification of DPUs, SmartNICs, switches, and routers can be accelerated from weeks to months using virtual network co-simulation. With this solution , any host OS or guest OS (VM) userspace program or Linux network utility can communicate with SoC RTL/FW through SystemVerilog MAC/PHY of Avery Virtual NIC VIP,” said Chris Browy, VP of Sales and of marketing at Avery.

Here are examples of actual programs or supported utilities:

  • SSH
  • IPsec/MACsec based on Linux kernel software
  • TCP/IP client-server programs
  • NVMe-oF SDK, specifically NVMe/TCP but including NVMe/RoCE, NVMe/iWARP
  • Custom OS Drivers, SDKs, and Userspace Programs

The virtual network device can be thought of as a simple Ethernet device which, instead of receiving packets from a physical medium (Ethernet NIC), receives them from the VIP Ethernet MAC/PHY RX which forwards them to the system’s network stack. operation. The Ethernet MAC/PHY VIP is connected to the interfaces of the SoC design, both of which are part of the SystemVerilog simulation test bed.

Conversely, instead of the OS network stack sending packets through a physical medium, they are sent through the MAC/PHY Ethernet VIP to the SoC design’s Ethernet RX interfaces.

Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables systems and SOC design teams to dramatically improve functional verification productivity through the use of formal analysis applications for X-level pessimism verification. gate and actual X root cause and sequential tracing; and robust chip-level verification IP for PCI Express, CXL, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD and FlexRay. The company has established numerous Avery Design VIP Partner Program affiliations with major IP vendors. More information is available at www.avery-design.com.


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